Assignment Industrial Electronics

Department of Electronics and Communications Fall 2010 ELEC 0331: Industrial Electronics Assignment Deadline of Submission: 22nd December 2010 Sessions: A and B Assignment Outcomes The Assignment will help you to 1. Identify and analyze industrial electronic circuits 2. Construct, measure, and troubleshoot circuits in application to industrial electronics. Guidelines: * Assignment must be computer typed. * Font – Times New Roman * Font – Style – Regular * Font – Size – 12 * Hardcopy is to be submitted. * Explain with suitable diagrams wherever required. The final assignment must have a Title Page, table of contents, reference/ bibliography and page number. * Heading should be with Font Size 14, Bold, and Underline. * Each student has to do the assignment individually. * You can refer books in Library or use internet resource. But you should not cut and paste material from internet nor provide photocopied material from books. The assignment answers should be in your own words after understanding the matter from the above resources. Rules & Regulations * If any two assignments are similar, then zero marks will be awarded for the assignment.

No chance of resubmission or appeal will be given. * However, if the plagiarism is found to be accidental the student may be advised to re- submit the work only once within one week from the date of rejection. A penalty of 25% of the total marks on the specific coursework assessment component will be imposed on the re-submitted work. If the re-submitted work is also found to be plagiarised the student will be awarded a zero mark in the assignment. * Your source of information should be mentioned in the reference page clearly. For example: If it’s from book, you have to mention the full details of the book with title, author name, edition and publisher’s name. If it is from the internet you have to mention the correct URL) * Title Page must have Assignment Name, Module name, your name, ID, Section and the name of the faculty. * Late submission of assignment will result in penalisation, i. e. 5% of the maximum mark specified for the assignment will be deducted for each working day. No assignment will be accepted after one week from the date of submission. Instructions: Solve the following problems as concisely and neatly as possible. * The maximum mark is 15. 1. Design the following conditions using an operational amplifier: a. Design an op-amp circuit that will provide an output voltage equal to the average of three input voltages. You may assume that the input voltages will be confined to the range -10V ? Vin? 10V. Verify your design by using Multisim software and a suitable set of input voltages. (1. 5 Marks) b. In an attempt to improve the security transmission, a chaotic time-varying signal is added to an audio signal prior to its being broadcast.

The same chaotic time-varying signal is also broadcast on a separate frequency. Assuming that any receiving antenna can be modeled as time-varying voltage source in series with a 300-? resistance, design a circuit to separate the two signals, discard the chaotic signal, amplify the audio signal by a factor of 10 and deliver the result to an 8-? speaker. (1. 5 Marks) 2. An SCR can be used in a battery-charging regulator as shown in Figure 1: (1 Mark Each) a. Determine the dc level of the full-wave rectified signal if a 1:1 transformer were employed. b.

If the battery in its uncharged state is sitting at 11 V, what is the anode-to-cathode voltage drop across SCR1? c. What is the maximum possible value of VR (VGK=0. 7V)? d. At the maximum value of part (c), what is the gate potential of SCR2? e. Once SRC2 has entered the short-circuit state, what is the level of V2? Figure 1 3. A PUT relaxation oscillator is shown in Figure 2: a. Will the network oscillate if VBB is changed to 10V? What minimum value of VBB is required (VV a constant)? (1 Mark) b. What value of R would place the network in the stable “on” state and remove the oscillatory response of the system? 1 Mark) c. 12V What value of R would make the network a 2-ms time-delay network? That is, provide a pulse vk 2ms after the supply is turned on and then stay in the “on” state. (1 Mark) VV=1V IP=100? A IV=5. 5mA R2=10k? R=20k? 1? F R3=5k? 100? Figure 2 4. Design a unijunction oscillator circuit as shown in Figure 3 for operation at: a. 1 kHz b. 150 kHz. Assume all the necessary values. Show all the calculations. Also, draw the output waveforms of VE, VB1 and VB2 using the Multisim software. (2 Marks Each) VBB VB2 VB1 R2 R1 RT CT VE Figure 3 +Vp -Vp

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